Louis Duret-Robert
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Ternary Computer

I first learnt about ternary computers in July 2015. Since then, I've been fascinated by this atypical, elegant and potentially under-estimated alternative to binary computing. Starting from the most fundamental rules of logic of this new algebra, my goal is to explore the feasibility and advantages of ternary processors.

Simple pipelined processor - SimP

19/02/2021
TernaryVerilog - Personal project - HDL - Processor architecture - Ternary logic

TernaryVerilog circuit optimizer (WIP)

31/01/2021
C++ - Personal project - HDL - Compiler design - Ternary logic

Binary and ternary SAP1 processor

03/12/2020
Python - Personal project - HDL - Processor architecture - Ternary logic

TelociDesi 2 : circuit simulation, signal analysis and debugging

04/10/2020
Electron - Personal project - Software development

TernaryVerilog : a custom hardware description language

22/08/2020
Python - Personal project - Ternary logic - HDL - Compiler

Working ternary ALU

02/12/2019
Ternary logic - Electronics - Personal project - School project

Ternary gate output rectification with Zener diode

08/11/2019
Ternary logic - Electronics - Personal project - School project

Design of PCBs for ternary gates

05/10/2019
Ternary logic - Electronics - Personal project - School project

Revising the ternary ALU design

30/09/2019
Ternary logic - Personal project - School project

Ternary gates implementation with CD4007

08/09/2019
Ternary logic - Electronics - Personal project - School project

Ternary logic circuit Designer and Simulator (WIP)

29/05/2019
Python - School project - Ternary logic - Software development - Tkinter

Ternary ALU design

30/06/2018
Ternary logic - Personal project

Ternary logic

21/06/2018
Ternary logic - Personal project
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